Over the decades Microsoft has produced various programming languages (e.g. C#, F#, Visual Basic) and flavours of their .NET paradigm, such as the very popular 4.x .NET Framework.
C# is very popular among Windows developers, as it is based on objected orientated programming concepts together with a few other pearls, such as automatic memory management (something that had to be handled manually in C++), in an attempt to provide many of the advantages of C++ in a much more simplified way.
These pros combined with the .NET Framework’s extensive charting library, UI toolbox, Networking, ML engine libraries and general ease of use in Microsoft Visual Studio was one of the primary reasons that many Windows-based scientific programs (e.g. ASN Filter Designer) were developed using the C# language and .NET Framework.
Over the last few years, Microsoft has tried to consolidate their .NET solution into a single, fast, cross-platform solution with the advent of the .NET Core paradigm. .NET Core is an open-source framework for developing Windows, web applications, services, and mobile applications and it can be run on Windows, Mac and Linux. Microsoft contends that .NET Core is much faster than the .NET Framework since the architecture has been completely rewritten to make it modular, lightweight, fast and cross-platform compatible.
DSP filtering library for C# .NET applications
For many modern scientific applications digital filtering of datasets is just one of the many components needed for an algorithm. This could be extracting ECG and PPG biomedical features, cancelling powerline interference or removing the noise from a dataset. In many cases, it is desirable to perform the filtering in real-time on streaming data as part of an algorithm updating dashboard analytics.
ASN Filter Designer provides .NET developers with an automatic code generator and SDK for developing high-performance data filtering applications in C#.
The tool’s project wizard bundles all of the necessary SDK framework files needed to run a designed filter cascade without the need for any other dependencies or 3rd party plugins. The deployed code is fully compatible with Microsoft Visual Studio and all .NET versions.
Sanjeev is an AIoT visionary and expert in signals and systems with a track record of successfully developing over 25 commercial products. He advises top international blue chip companies on their AIoT solutions and strategies for I4.0, telemedicine, smart healthcare, smart grids and smart buildings.
ASN Filter Designer’s ANSI C SDK framework, provides developers with a comprehensive C code framework for developing AIoT filtering application on microcontrollers and embedded platforms. Although the framework has been primarily designed to support the just ASN filter Designer’s filter cascade, it is possible to create extra filter objects to augment the cascade.
Two common filtering methods used by AIoT developers are the Median and moving average (MA) filters. Although these fully integrated within the Framework’s filter cascade, it is often useful to have the flexibility of an additional filtering block to act as a post filter smoothing filter.
An extra median or MA filter may be easily added to main.c as shown below. Notice that data is filtered in blocks of 4 as required by the framework.
Median filter
The Median filter is non-linear filtering method that uses the concept of majority voting (i.e. calculating the median) to remove glitches and smooth data. It is edge preserving, making it a good choice for enhancing square waves or pulse like data.
#include "ASN_DSP/DSPFilters/MedianFilter.h"
float InputTemp[4];
float OutputTemp[4];
MedianFilter_t MyMedianfilter;
InitMedianFilter(&MyMedianfilter,7); // median of length 7
for (n=0; n<TEST_LENGTH_SAMPLES; n+=4)
{
InputTemp[0]=InputValues[n];
InputTemp[1]=InputValues[n+1];
InputTemp[2]=InputValues[n+2];
InputTemp[3]=InputValues[n+3];
MedianFilterData(&MyMedianfilter,InputTemp, OutputTemp);
OutputValues[n]=OutputTemp[0];
OutputValues[n+1]=OutputTemp[1];
OutputValues[n+2]=OutputTemp[2];
OutputValues[n+3]=OutputTemp[3];
}
Moving Average filter
The moving average (MA) filter is optimal for reducing random noise while retaining a sharp step response, making it a versatile building block for smart sensor signal processing applications. It is perhaps one of the most widely used digital filters due to its conceptual simplicity and ease of implementation.
#include "ASN_DSP/DSPFilters/MAFilter.h"
float InputTemp[4];
float OutputTemp[4];
MAFilter_t MyMAfilter;
InitMAFilter(&MyMAfilter,9); // MA of length 9
for (n=0; n<TEST_LENGTH_SAMPLES; n+=4)
{
InputTemp[0]=InputValues[n];
InputTemp[1]=InputValues[n+1];
InputTemp[2]=InputValues[n+2];
InputTemp[3]=InputValues[n+3];
MAFilterData(&MyMAfilter,InputTemp, OutputTemp);
OutputValues[n]=OutputTemp[0];
OutputValues[n+1]=OutputTemp[1];
OutputValues[n+2]=OutputTemp[2];
OutputValues[n+3]=OutputTemp[3];
}
Marty is an applications engineer and embedded software expert at ASN. He has over 10 years experience in developing high performance embedded libraries and applications for Arm processors.
https://www.advsolned.com/wp-content/uploads/2023/04/ansic-e1680791468445.png313400Marty de Vrieshttps://www.advsolned.com/wp-content/uploads/2018/02/ASN_logo.jpgMarty de Vries2023-04-06 15:25:212023-05-16 09:32:09How to add an extra MA or Median filter to the ASN DSP filtering ANSI C code framework
Many Audio/acoustics engineers and researchers and audio hobbyists work with DSP (Digital Signal Processing). Some now and then, some on daily basis. Working on DSP for audio and speech, common challenges to create digital filters are: Noise cancellation, due to interference and Audio and Speech enhancement. And for whom DSP is not his daily job: filter design in general. In this blog, you’ll find out how the ASN Filter Designer may help for both experienced audio engineers and engineers where DSP is not their daily job to create digital filters for audio and speech.
For whom? For those with some and experienced DSP knowledge alike
If you are a audio/acoustics engineer or researcher or hobbyist: ASN Filter Designer is tailored for whom DSP is not his daily job and with some knowledge DSP. For those who need filter design and have to create some signal analysis. But also for those whom DSP is his daily job and want to save time and money. Most engineers who are working with DSP on a daily basis, are usually working with extensive but also expensive tools. Or want to do the maths themselves. Also for them ASN Filter Designer is useful:
Intuitive and easy to use.
Save days of time spending calculating on your own for the price of 2-3 hours of work.
Few lesser costs then extensive tooling with features you don’t use anyway.
Automatic code generation: export for further analysis to Matlab, etc, or to Cortex-M Arm based processors via the Arm CMSIS-DSP software framework.
How DSP for Speech and audio benefit from ASN Filter Designer:
Experiment with a variety of equalisation, noise cancellation and sound effect audio filtering algorithms.
Perform data analysis in the frequency domain and via specialised methods, including Cepstral analysis on the streaming data.
Import your own wav audio files (mono or stereo up to 48kHz) for streaming, and modify the filter characteristics in real-time while listening to the filtered audio stream.
Some features for creating digital filters for Audio and Speech:
The sampling frequency may be specified up to 4 decimal places
which is useful for designing filters based on fractional sampling frequencies, such as multiples of the 44.1kHz audio standard. Common examples include audio interpolation filters: 44.1kHz × 128 = 5.6448MHz and 44.1kHz × 256 = 11.2896MHz.
Filter orders of up to 499
may be constructed, where this is limited to 200 for streaming audio applications. As with the IIR filters, a FIR’s zeros may be modified by the P-Z editor (Method dropdown list changes to User defined), including the ability of adding poles and converting it into an IIR filter.
Audio and user data playback streaming
Signal Generator Controller: Choose what you want to listen to; Adjust the amplitude of the input signal
The signal analyzer allows designers to test their design on audio, real (user) data or synthetic data via the built-in signal generator. Default data playback is implemented as streaming data, providing a simple way of assessing the filter’s dynamic performance, which is especially useful for fixed point implementations. Both frequency domain and time domain charts are fully supported, allowing for design verification via transfer function estimation using the cross and power spectral density functions. As with all other charts, the signal analyzer chart fully supports advanced zooming and panning, as well as comprehensive chart data file export options.
Load .wav for playback
The signal generator allows you to load .wav audio files for playback via the Audio File method. Both mono and stereo formats are fully supported for 8.000, 11.025, 16.000, 22.05, 44.1 and 48kHz. sampling rates. There is no restriction as to the length of the .wav file.
You may add extra signals to input audio stream
Use the signal generator to add sinewaves and white noise to the data stream.
Intuitive data analysis with the mouse
Move the mouse over the chart will automatically produce data markers and data analytics (shown at the bottom right side of the GUI). The signal analyzer is directly coupled to the filter designer GUI. This means that you may modify the filter characteristics, and see the effects in real-time in the signal analyzer. This functionality is very useful when designing audio filters, as the new filter settings can be heard immediately on the streaming audio feed.
Digital filters commonly used in audio and speech
The ASN Filter designer includes digital filters commonly used in audio such as:
What are Finite Impulse Respsonse (FIR) Filters? And how to design FIR Filters in ASN Filter Designer and which filters does ASN Filter Designer support?
https://www.advsolned.com/wp-content/uploads/2018/07/Direct-Form.png11151050ASN consultancy teamhttps://www.advsolned.com/wp-content/uploads/2018/02/ASN_logo.jpgASN consultancy team2020-08-22 14:30:522021-03-12 16:19:02How to design FIR Filters in ASN Filter Designer
The P-Z (pole-zero) editor, comprehensive and easy to use pole-zero editor. Together with useful options not commonly found in other filter design software.
Finite impulse response (FIR) filters are useful for a variety of sensor signal processing applications, including audio and biomedical signal processing. Although several practical implementations for the FIR exist, the Direct Form Transposed structure offers the best numerical accuracy for floating point implementation. However, when considering fixed point implementation on a micro-controller, the Direct Form structure is considered to be the best choice by virtue of its large accumulator that accommodates any intermediate overflows.
This application note specifically addresses FIR filter design and implementation on a Cortex-M based microcontroller with the ASN Filter Designer for both floating point and fixed point applications via the Arm CMSIS-DSP software framework. Details are also given (including an Arm reference software pack) regarding implementation of the FIR filter in Arm/Keil’s MDK industry standard Cortex-M micro-controller development kit.
Introduction
ASN Filter Designer provides engineers with a powerful DSP experimentation platform, allowing for the design, experimentation and deployment of complex FIR digital filter designs for a variety of sensor measurement applications. The tool’s advanced functionality, includes a graphical based real-time filter designer, multiple filter blocks, various mathematical I/O blocks, live symbolic math scripting and real-time signal analysis (via a built-in signal analyser). These advantages coupled with automatic documentation and code generation functionality allow engineers to design and validate a digital filter within minutes rather than hours.
The Arm CMSIS-DSP (Cortex Microcontroller Software Interface Standard) software framework is a rich collection of over sixty DSP functions (including various mathematical functions, such as sine and cosine; IIR/FIR filtering functions, complex math functions, and data types) developed by Arm that have been optimised for their range of Cortex-M processor cores.
The framework makes extensive use of highly optimised SIMD (single instruction, multiple data) instructions, that perform multiple identical operations in a single cycle instruction. The SIMD instructions (if supported by the core) coupled together with other optimisations allow engineers to produce highly optimised signal processing applications for Cortex-M based micro-controllers quickly and simply.
ASN Filter Designer fully supports the CMSIS-DSP software framework, by automatically producing optimised C code based on the framework’s DSP functions via its code generation engine.
Designing FIR filters with the ASN Filter Designer
ASN Filter Designer provides engineers with an easy to use, intuitive graphical design development platform for FIR digital filter design. The tool’s real-time design paradigm makes use of graphical design markers, allowing designers to simply draw and modify their magnitude frequency response requirements in real-time while allowing the tool automatically fill in the exact specifications for them.
Consider the design of the following technical specification:
Fs:
500Hz
Passband frequency:
0-25Hz
Type:
Lowpass
Method:
Parks-McClellan
Stopband attenuation @ 125Hz:
≥ 80 dB
Passband ripple:
< 0.01dB
Order:
Small as possible
Graphically entering the specifications into the ASN Filter Designer, and fine tuning the design marker positions, the tool automatically designs the filter), automatically choosing the required filter order, and in essence – automatically producing the filter’s exact technical specification!
The frequency response of a filter meeting the specification is shown below:
This Lowpass filter will form the basis of the discussion presented herein.
Parks–McClellan algorithm
The Parks–McClellan algorithm is an iterative algorithm for finding the optimal Chebyshev FIR filter. The algorithm uses an indirect method for finding the optimal filter coefficients, that offers a degree of flexibility over other FIR design methods, in that each band may be individually customised in order to suit the designer’s requirements.
The primary FIR filter designer UI implements the Parks-McClellan algorithm, allowing for the design of the following filter types:
Filter Types
Description
Lowpass
Designs a lowpass filter.
Highpass
Designs a highpass filter.
Bandpass
Designs a bandpass filter.
Bandstop
Designs a bandstop filter.
Multiband
Designs a multiband filter with an arbitrary frequency response.
Hilbert transformer
Designs an all-pass filter with a -90 degree phase shift.
Differentiator
Designs a filter with +20dB/decade slope and +90 degree phase shift.
Double Differentiator
Designs a filter with +40dB/decade slope and a +90 degree phase shift.
Integrator
Designs a filter with -20dB/decade slope and a -90 degree phase shift.
Double Integrator
Designs a filter with -40dB/decade slope and a -90 degree phase shift.
These ten filter types provide designers with a great deal of flexibility for a variety of IoT applications. Design requirements may be simply specified via the use of the design markers. In all cases, the tool will automatically calculate the required filter order to meet the designer’s specification.
The Parks-McClellan algorithm is an optimal Chebyshev FIR design method. However, the algorithm may not converge for some specifications. In such cases, increasing the distance between the design marker bands generally helps.
Other FIR design methods
Designers looking to experiment with other types of FIR design methods may use the ASN FilterScript live symbolic math scripting language. The scripting language supports over 65 scientific commands and provides designers with a familiar and powerful programming language, while at the same time allowing them to implement complex symbolic mathematical expressions. The following functions are supported:
Function
Description
movaver
Moving average FIR filter design.
firwin
FIR filter design based on the Window method.
firarb
Designs an FIR Window based filter with an arbitrary magnitude response.
firkaiser
Designs an FIR filter based on the Kaiser window method.
firgauss
Designs an FIR Gaussian lowpass filter.
savgolay
Design an FIR Savitzky-Golay lowpass smoothing filter.
Please refer to the ASN FilterScript reference guide for more details.
All filters designed in ASN FilterScript are designed using double precision arithmetic in the H2 filter sandbox. An H2 filter must be transformed to an H1 (primary) filter for deployment.
This may be simply achieved via the P-Z options menu:
The re-optimise method automatically analyses and converts the H2 filter into an H1 filter.
Floating point implementation
When implementing a filter in floating point (i.e. using double or single precision arithmetic) the Direct Form Transposed structure is considered the most numerically accurate. This can be readily seen by analysing the difference equations below (used for implementation), as the undesirable effects of numerical swamping are minimised, since floating point addition is performed on numbers of similar magnitude.
The quantisation and filter structure settings used to implement the FIR can be found under the Q tab (as shown below).
Despite the Direct FormTransposed structure being the most efficient for floating point implementation, the Arm CMSIS-DSP library does not currently support the Direct FormTransposed structure for FIR filters. Only the Direct Form structure is supported.
Setting Arithmetic to Single Precision and Structure to Direct Form and clicking on the Apply button configures the FIR considered herein for the CMSIS-DSP software framework.
The optimised functions within the Arm CMSIS-DSP framework currently support Single Precision arithmetic only.
Support for Double Precision and the Direct FormTransposed structure will be added in future releases.
Fixed point implementation
When implementing a filter with fixed point arithmetic, the Direct Form structure is considered to be the best choice by virtue of its large accumulator that accommodates any intermediate overflows. The Direct Form structure and associated difference equation are shown below.
Direct form structure (for fixed point implementation)
The CMSIS-DSP Framework supports Q7, Q15 and Q31 coefficient quantisation only. The options may be simply specified via the quantisation tab Q as shown below:
The tool’s inbuilt analytics (shown in the textbox) are intended to help the designer choose the most suitable quantisation settings.
As seen on the left, the tool has recommended a RFWL (recommended fraction length) of 15bits (Q15) for the coefficients, which is as required.
The Direct form structure is chosen over the Direct Form Transposed as a single (40-bit) accumulator can be used. The tool’s automatic code generator makes use of CMSIS-DSP’s 64-bit accumulators functions, so that the final C code deployed to a Cortex-M device will not overflow.
Deploying Arm CMSIS-DSP compliant code
The ASN Filter Designer’s automatic code generation engine facilitates the export of a designed filter to Cortex-M Arm based processors via the Arm CMSIS-DSP software framework. The tool’s built-in analytics and help functions assist the designer in successfully configuring the design for deployment.
Select the Arm CMSIS-DSP framework from the selection box in the filter summary window:
The automatically generated C code based on the Arm CMSIS-DSP framework for direct implementation on an Arm based Cortex-M processor is shown below:
This code may be directly used in any Cortex-M based development project.
Arm Keil’s MDK (uVision)
As mentioned above, the code generated by the Arm CMSIS DSP code generator may be directly used in any Cortex-M based development project tooling, such as Arm Keil’s industry standard uVision MDK (micro-controller development kit).
The following Arm software pack is available on Keil’s website for using this code directly with Keil uVision MDK.
https://www.advsolned.com/wp-content/uploads/2020/04/df2T_fir.png306900ASN consultancy teamhttps://www.advsolned.com/wp-content/uploads/2018/02/ASN_logo.jpgASN consultancy team2020-06-11 17:36:292022-11-25 14:51:35Implementing FIR filters with the ASN Filter Designer and the Arm CMSIS-DSP software framework
Although the design of FIR filters with linear phase is an easy task. This is certainly not true for IIR filters that usually have a highly non-linear phase response, especially around the filter’s cut-off frequencies. This article discusses the characteristics needed for a digital filter to have linear phase, and how an IIR filter’s passband phase can be modified in order to achieve linear phase using all-pass equalisation filters.
Why do we need linear phase filters?
Digital filters with linear phase have the advantage of delaying all frequency components by the same amount, i.e. they preserve the input signal’s phase relationships. This preservation of phase means that the filtered signal retains the shape of the original input signal. This characteristic is essential for audio applications as the signal shape is paramount for maintaining high fidelity in the filtered audio. Yet another application area that requires this, is ECG biomedical waveform analysis, as any artefacts introduced by the filter may be misinterpreted as heart anomalies.
The following plot shows the filtering performance of a Chebyshev type I lowpass IIR on ECG data – input waveform (shown in blue) shifted by 10 samples (\(\small \Delta=10\)) to approximately compensate for the filter’s group delay. Notice that the filtered signal (shown in red) has attenuated, broadened and added oscillations around the ECG peak, which is undesirable.
Figure 1: IIR lowpass filtering result with phase distortion
In order for a digital filter to have linear phase, its impulse response must have conjugate-even or conjugate-odd symmetry about its midpoint. This is readily seen for an FIR filter,
Analysing Eqn. 3, we see that roots (zeros) of \(\small H(z)\) must also be the zeros of \(\small H^\ast (1/z^\ast)\). This means that the roots of \(\small H(z)\) must occur in conjugate reciprocal pairs, i.e. if \(\small z_k\) is a zero of \(\small H(z)\), then \(\small H^\ast (1/z^\ast)\) must also be a zero.
Why IIR filters do not have linear phase
A digital filter is said to be bounded input, bounded output stable, or BIBO stable, if every bounded input gives rise to a bounded output. All IIR filters have either poles or both poles and zeros, and must be BIBO stable, i.e.
Where, \(\small h(k)\) is the filter’s impulse response. Analyzing Eqn. 4, it should be clear that the BIBO stability criterion will only be satisfied if the system’s poles lie inside the unit circle, since the system’s ROC (region of convergence) must include the unit circle. Consequently, it is sufficient to say that a bounded input signal will always produce a bounded output signal if all the poles lie inside the unit circle.
The zeros on the other hand, are not constrained by this requirement, and as a consequence may lie anywhere on z-plane, since they do not directly affect system stability. Therefore, a system stability analysis may be undertaken by firstly calculating the roots of the transfer function (i.e., roots of the numerator and denominator polynomials) and then plotting the corresponding poles and zeros upon the z-plane.
Applying the developed logic to the poles of an IIR filter, we now arrive at a very important conclusion on why IIR filters cannot have linear phase.
A BIBO stable filter must have its poles within the unit circle, and as such in order to get linear phase, an IIR would need conjugate reciprocal poles outside of the unit circle, making it BIBO unstable.
Based upon this statement, it would seem that it’s not possible to design an IIR to have linear phase. However, a discussed below, phase equalisation filters can be used to linearise the passband phase response.
Phase linearisation with all-pass filters
All-pass phase linearisation filters (equalisers) are a well-established method of altering a filter’s phase response while not affecting its magnitude response. A second order (Biquad) all-pass filter is defined as:
Where, \(\small f_c\) is the centre frequency, \(\small r\) is radius of the poles and \(\small f_s\) is the sampling frequency. Notice how the numerator and denominator coefficients are arranged as a mirror image pair of one another. The mirror image property is what gives the all-pass filter its desirable property, namely allowing the designer to alter the phase response while keeping the magnitude response constant or flat over the complete frequency spectrum.
Cascading an APF (all-pass filter) equalisation cascade (comprised of multiple APFs) with an IIR filter, the basic idea is that we only need to linearise the phase response the passband region. The other regions, such as the transition band and stopband may be ignored, as any non-linearities in these regions are of little interest to the overall filtering result.
The challenge
The APF cascade sounds like an ideal compromise for this challenge, but in truth a significant amount of time and very careful fine-tuning of the APF positions is required in order to achieve an acceptable result. Each APF has two variables: \(\small f_c\) and \(\small r\) that need to be optimised, which complicates the solution. This is further complicated by the fact that the more APF stages that are added to the cascade, the higher the overall filter’s group delay (latency) becomes. This latter issue may become problematic for fast real-time closed loop control systems that rely on an IIR’s low latency property.
Nevertheless, despite these challenges, the APF equaliser is a good compromise for linearising an IIRs passband phase characteristics.
The APF equaliser
ASN Filter Designer provides designers with a very simple to use graphical all-phase equaliser interface for linearising the passband phase of IIR filters. As seen below, the interface is very intuitive, and allows designers to quickly place and fine-tune APF filters positions with the mouse. The tool automatically calculates \(\small f_c\) and \(\small r\), based on the marker position.
Right clicking on the frequency response chart or on an existing all-pass design marker displays an options menu, as shown on the left.
You may add up to 10 biquads (professional version only).
An IIR with linear passband phase
Designing an equaliser composed of three APF pairs, and cascading it with the Chebyshev filter of Figure 1, we obtain a filter waveform that has a much a sharper peak with less attenuation and oscillation than the original IIR – see below. However, this improvement comes at the expense of three extra Biquad filters (the APF cascade) and an increased group delay, which has now risen to 24 samples compared with the original 10 samples.
IIR lowpass filtering result with three APF phase equalisation filters (minimal phase distortion)
The frequency response of both the original IIR and the equalised IIR are shown below, where the group delay (shown in purple) is the average delay of the filter and is a simpler way of assessing linearity.
IIR without equalisation cascade
IIR with equalisation cascade
Notice that the group delay of the equalised IIR passband (shown on the right) is almost flat, confirming that the phase is indeed linear.
Automatic code generation to Arm processor cores via CMSIS-DSP
The ASN Filter Designer’s automatic code generation engine facilitates the export of a designed filter to Cortex-M Arm based processors via the CMSIS-DSP software framework. The tool’s built-in analytics and help functions assist the designer in successfully configuring the design for deployment.
Before generating the code, the IIR and equalisation filters (i.e. H1 and Heq filters) need to be firstly re-optimised (merged) to an H1 filter (main filter) structure for deployment. The options menu can be found under the P-Z tab in the main UI.
All floating point IIR filters designs should be based on Single Precision arithmetic and either a Direct Form I or Direct Form II Transposed filter structure, as this is supported by a hardware multiplier in the M4F, M7F, M33F and M55F cores. Although you may choose Double Precision, hardware support is only available in some M7F and M55F Helium devices. The Direct Form II Transposed structure is advocated for floating point implementation by virtue of its higher numerically accuracy.
Quantisation and filter structure settings can be found under the Q tab (as shown on the left). Setting Arithmetic to Single Precision and Structure to Direct Form II Transposed and clicking on the Apply button configures the IIR considered herein for the CMSIS-DSP software framework.
Select the Arm CMSIS-DSP framework from the selection box in the filter summary window:
The automatically generated C code based on the CMSIS-DSP framework for direct implementation on an Arm based Cortex-M processor is shown below:
The ASN Filter Designer’s automatic code generator generates all initialisation code, scaling and data structures needed to implement the linearised filter IIR filter via Arm’s CMSIS-DSP library.
Arm deployment wizard
Professional licence users may expedite the deployment by using the Arm deployment wizard. The built in AI will automatically determine the best settings for your design based on the quantisation settings chosen.
The built in AI automatically analyses your complete filter cascade and converts any H2 or Heq filters into an H1 for implementation.
What we have learnt
The roots of a linear phase digital filter must occur in conjugate reciprocal pairs. Although this no problem for an FIR filter, it becomes infeasible for an IIR filter, as poles would need to be both inside and outside of the unit circle, making the filter BIBO unstable.
The passband phase response of an IIR filter may be linearised by using an APF equalisation cascade. The ASN Filter Designer provides designers with everything they need via a very simple to use, graphical all-pass phase equaliser interface, in order to design a suitable APF cascade by just using the mouse!
The linearised IIR filter may be exported via the automatic code generator using Arm’s optimised CMSIS-DSP library functions for deployment on any Cortex-M microcontroller.
Sanjeev is an AIoT visionary and expert in signals and systems with a track record of successfully developing over 25 commercial products. He advises top international blue chip companies on their AIoT solutions and strategies for I4.0, telemedicine, smart healthcare, smart grids and smart buildings.
A digital filter is a mathematical algorithm that operates on a digital dataset (e.g. sensor data) in order extract information of interest and remove any unwanted information. Applications of this type of technology, include removing glitches from sensor data or even cleaning up noise on a measured signal for easier data analysis. But how do we choose the best type of digital filter for our application? And what are the differences between an IIR filter and an FIR filter?
Digital filters are divided into the following two categories:
Infinite impulse response (IIR)
Finite impulse response (FIR)
As the names suggest, each type of filter is categorised by the length of its impulse response. However, before beginning with a detailed mathematical analysis, it is prudent to appreciate the differences in performance and characteristics of each type of filter.
Example
In order to illustrate the differences between an IIR and FIR, the frequency response of a 14th order FIR (solid line), and a 4th order Chebyshev Type I IIR (dashed line) is shown below in Figure 1. Notice that although the magnitude spectra have a similar degree of attenuation, the phase spectrum of the IIR filter is non-linear in the passband (\(\small 0\rightarrow7.5Hz\)), and becomes very non-linear at the cut-off frequency, \(\small f_c=7.5Hz\). Also notice that the FIR requires a higher number of coefficients (15 vs the IIR’s 10) to match the attenuation characteristics of the IIR.
Figure 1:FIR vs IIR: frequency response of a 14th order FIR (solid line), and a 4th order Chebyshev Type I IIR (dashed line)
These are just some of the differences between the two types of filters. A detailed summary of the main advantages and disadvantages of each type of filter will now follow.
IIR filters
IIR (infinite impulse response) filters are generally chosen for applications where linear phase is not too important and memory is limited. They have been widely deployed in audio equalisation, biomedical sensor signal processing, IoT/IIoT smart sensors and high-speed telecommunication/RF applications.
Advantages
Low implementation cost: requires less coefficients and memory than FIR filters in order to satisfy a similar set of specifications, i.e., cut-off frequency and stopband attenuation.
Low latency: suitable for real-time control and very high-speed RF applications by virtue of the low number of coefficients.
Analog equivalent: May be used for mimicking the characteristics of analog filters using s-z plane mapping transforms.
Disadvantages
Non-linear phase characteristics: The phase charactersitics of an IIR filter are generally nonlinear, especially near the cut-off frequencies. All-pass equalisation filters can be used in order to improve the passband phase characteristics.
More detailed analysis: Requires more scaling and numeric overflow analysis when implemented in fixed point. The Direct form II filter structure is especially sensitive to the effects of quantisation, and requires special care during the design phase.
Numerical stability: Less numerically stable than their FIR (finite impulse response) counterparts, due to the feedback paths.
FIR filters
FIR (finite impulse response) filters are generally chosen for applications where linear phase is important and a decent amount of memory and computational performance are available. They have a widely deployed in audio and biomedical signal enhancement applications. Their all-zero structure (discussed below) ensures that they never become unstable for any type of input signal, which gives them a distinct advantage over the IIR.
Advantages
Linear phase: FIRs can be easily designed to have linear phase. This means that no phase distortion is introduced into the signal to be filtered, as all frequencies are shifted in time by the same amount – thus maintaining their relative harmonic relationships (i.e. constant group and phase delay). This is certainly not case with IIR filters, that have a non-linear phase characteristic.
Stability: As FIRs do not use previous output values to compute their present output, i.e. they have no feedback, they can never become unstable for any type of input signal, which is gives them a distinct advantage over IIR filters.
Arbitrary frequency response: The Parks-McClellan and ASN FilterScript’s firarb() function allow for the design of an FIR with an arbitrary magnitude response. This means that an FIR can be customised more easily than an IIR.
Fixed point performance: the effects of quantisation are less severe than that of an IIR.
Disadvantages
High computational and memory requirement: FIRs usually require many more coefficients for achieving a sharp cut-off than their IIR counterparts. The consequence of this is that they require much more memory and significantly a higher amount of MAC (multiple and accumulate) operations. However, modern microcontroller architectures based on the Arm’s Cortex-M cores now include DSP hardware support via SIMD (signal instruction, multiple data) that expedite the filtering operation significantly.
Higher latency: the higher number of coefficients, means that in general a linear phase FIR is less suitable than an IIR for fast high throughput applications. This becomes problematic for real-time closed-loop control applications, where a linear phase FIR filter may have too much group delay to achieve loop stability.
Minimum phase filters: A solution to ovecome the inherent N/2 latency (group delay) in a linear filter is to use a so-called minimum phase filter, whereby any zeros outside of the unit circle are moved to their conjugate reciprocal locations inside the unit circle. The result of thezero flipping operation is that the magnitude spectrum will be identical to the original filter, and the phase will be nonlinear, but most importantly the latency will be reduced from N/2 to something much smaller (although non-constant), making it suitable for real-time control applications. For applications where phase is less important, this may sound ideal, but the difficulty arises in the numerical accuracy of the root-finding algorithm when dealing with large polynomials. Therefore, orders of 50 or 60 should be considered a maximum when using this approach. Although other methods do exist (e.g. the Complex Cepstrum), transforming higher-order linear phase FIRs to their minimum phase cousins remains a challenging task.
No analog equivalent: using the Bilinear, matched z-transform (s-z mapping), an analog filter can be easily be transformed into an equivalent IIR filter. However, this is not possible for an FIR as it has no analog equivalent.
Mathematical definitions
As discussed in the introduction, the name IIR and FIR originate from the mathematical definitions of each type of filter, i.e. an IIR filter is categorised by its theoretically infinite impulse response,
Practically speaking, it is not possible to compute the output of an IIR using this equation. Therefore, the equation may be re-written in terms of a finite number of poles \(\small p\) and zeros \(\small q\), as defined by the linear constant coefficient difference equation given by:
where, \(\small a_k\) and \(\small b_k\) are the filter’s denominator and numerator polynomial coefficients, who’s roots are equal to the filter’s poles and zeros respectively. Thus, a relationship between the difference equation and the z-transform (transfer function) may therefore be defined by using the z-transform delay property such that,
As seen, the transfer function is a frequency domain representation of the filter. Notice also that the poles act on the outputdata, and the zeros on the inputdata. Since the poles act on the output data, and affect stability, it is essential that their radii remain inside the unit circle (i.e. <1) for BIBO (bounded input, bounded output) stability. The radii of the zeros are less critical, as they do not affect filter stability. This is the primary reason why all-zero FIR (finite impulse response) filters are always stable.
BIBO stability
A linear time invariant (LTI) system (such as a digital filter) is said to be bounded input, bounded output stable, or BIBO stable, if every bounded input gives rise to a bounded output, as
Where, \(\small h(k)\) is the LTI system’s impulse response. Analyzing this equation, it should be clear that the BIBO stability criterion will only be satisfied if the system’s poles lie inside the unit circle, since the system’s ROC (region of convergence) must include the unit circle. Consequently, it is sufficient to say that a bounded input signal will always produce a bounded output signal if all the poles lie inside the unit circle.
The zeros on the other hand, are not constrained by this requirement, and as a consequence may lie anywhere on z-plane, since they do not directly affect system stability. Therefore, a system stability analysis may be undertaken by firstly calculating the roots of the transfer function (i.e., roots of the numerator and denominator polynomials) and then plotting the corresponding poles and zeros upon the z-plane.
An interesting situation arises if any poles lie on the unit circle, since the system is said to be marginally stable, as it is neither stable or unstable. Although marginally stable systems are not BIBO stable, they have been exploited by digital oscillator designers, since their impulse response provides a simple method of generating sine waves, which have proved to be invaluable in the field of telecommunications.
Biquad IIR filters
The IIR filter implementation discussed herein is said to be biquad, since it has two poles and two zeros as illustrated below in Figure 2. The biquad implementation is particularly useful for fixed point implementations, as the effects of quantization and numerical stability are minimised. However, the overall success of any biquad implementation is dependent upon the available number precision, which must be sufficient enough in order to ensure that the quantised poles are always inside the unit circle.
Figure 2: Direct Form I (biquad) IIR filter realization and transfer function.
Analysing Figure 2, it can be seen that the biquad structure is actually comprised of two feedback paths (scaled by \(\small a_1\) and \(\small a_2\)), three feed forward paths (scaled by \(\small b_0, b_1\) and \(\small b_2\)) and a section gain, \(\small K\). Thus, the filtering operation of Figure 1 can be summarised by the following simple recursive equation:
Analysing the equation, notice that the biquad implementation only requires four additions (requiring only one accumulator) and five multiplications, which can be easily accommodated on any Cortex-M microcontroller. The section gain, \(\small K\) may also be pre-multiplied with the forward path coefficients before implementation.
A collection of Biquad filters is referred to as a Biquad Cascade, as illustrated below.
The ASN Filter Designer can design and implement a cascade of up to 50 biquads (Professional edition only).
Floating point implementation
When implementing a filter in floating point (i.e. using double or single precision arithmetic) Direct Form II structures are considered to be a better choice than the Direct Form I structure. The Direct Form II Transposed structure is considered the most numerically accurate for floating point implementation, as the undesirable effects of numerical swamping are minimised as seen by analysing the difference equations.
Figure 3 – Direct Form II Transposed strucutre, transfer function and difference equations
The filter summary (shown in Figure 4) provides the designer with a detailed overview of the designed filter, including a detailed summary of the technical specifications and the filter coefficients, which presents a quick and simple route to documenting your design.
The ASN Filter Designer supports the design and implementation of both single section and Biquad (default setting) IIR filters.
Figure 4: detailed specification.
FIR definition
Returning the IIR’s linear constant coefficient difference equation, i.e.
Notice that when we set the \(\small a_k\) coefficients (i.e. the feedback) to zero, the definition reduces to our original the FIR filter definition, meaning that the FIR computation is just based on past and present inputs values, namely:
\(\displaystyle
y(n)=\sum_{k=0}^{q}b_kx(n-k)
\)
Implementation
Although several practical implementations for FIRs exist, the direct formstructure and its transposed cousin are perhaps the most commonly used, and as such, all designed filter coefficients are intended for implementation in a Direct form structure.
The Direct form structure and associated difference equation are shown below. The Direct Form is advocated for fixed point implementation by virtue of the single accumulator concept.
The recommended (default) structure within the ASN Filter Designer is the Direct Form Transposed structure, as this offers superior numerical accuracy when using floating point arithmetic. This can be readily seen by analysing the difference equations below (used for implementation), as the undesirable effects of numerical swamping are minimised, since floating point addition is performed on numbers of similar magnitude.
Digital filters are divided into the following two categories:
Infinite impulse response (IIR)
Finite impulse response (FIR)
IIR (infinite impulse response) filters are generally chosen for applications where linear phase is not too important and memory is limited. They have been widely deployed in audio equalisation, biomedical sensor signal processing, IoT/IIoT smart sensors and high-speed telecommunication/RF applications.
FIR (finite impulse response) filters are generally chosen for applications where linear phase is important and a decent amount of memory and computational performance are available. They have a widely deployed in audio and biomedical signal enhancement applications.
ASN Filter Designer provides engineers with everything they need to design, experiment and deploy complex IIR and FIR digital filters for a variety of sensor measurement applications. These advantages coupled with automatic documentation and code generation functionality allow engineers to design and validate an IIR/FIR digital filter within minutes rather than hours.
Sanjeev is an AIoT visionary and expert in signals and systems with a track record of successfully developing over 25 commercial products. He advises top international blue chip companies on their AIoT solutions and strategies for I4.0, telemedicine, smart healthcare, smart grids and smart buildings.
https://www.advsolned.com/wp-content/uploads/2020/04/fir_iir.png453622Dr. Sanjeev Sarpalhttps://www.advsolned.com/wp-content/uploads/2018/02/ASN_logo.jpgDr. Sanjeev Sarpal2020-04-28 13:35:442023-05-12 09:25:58Difference between IIR and FIR filters: a practical design guide
Modern embedded processors, software frameworks and design tooling now allow engineers to apply advanced measurement concepts to smart factories as part of the I4.0 revolution.
In recent years, PM (predictive maintenance) of machines has received great attention, as factories look to maximise their production efficiency while at the same time retaining the invaluable skills of experienced foremen and production workers.
Traditionally, a foreman would walk around the shop floor and listen to the sounds a machine would make to get an idea of impending failure. With the advent of I4.0 technology, microphones, edge DSP algorithms and ML may now be employed in order to ‘listen’ to the sounds a machine makes and then make a classification and prediction.
One of the major challenges is how to make a computer hear like a human.
Physics of the human ear
An illustration of the human ear shown below. As seen, the basic task of the ear is to translate sound (air vibration) into electrical nerve impulses for the brain to interpret.
The ear achieves this via three bones (Stapes, Incus and Malleus) that act as a mechanical amplifier for vibrations received at the eardrum. These amplified sounds are then passed onto the Cochlea via the Oval window (not shown).
The Cochlea (shown in purple) is filled with a fluid that moves in response to the vibrations from the oval window. As the fluid moves, thousands of nerve endings are set into motion. These nerve endings transform sound vibrations into electrical impulses that travel along the auditory nerve fibres to the brain for analysis.
Modelling perceived sound
Due to complexity of the fluidic mechanical construction of the human auditory system, low and high frequencies are typically not discernible. Researchers over the years have found that humans are most perceptive to sounds in the 1-6kHz range, although this range varies according to the subject’s physical health.
This research led to the definition of a set of weighting curves: the so-called A, B, C and D weighting curves, which equalises a microphone’s frequency response. These weighting curves aim to bring the digital and physical worlds closer together by allowing a computerised microphone-based system to hear like a human.
The A-weighing curve is the most widely used as it is mandated by IEC-61672 to be fitted to all sound level meters. The B and D curves are hardly ever used, but C-weighting may be used for testing the impact of noise in telecoms systems.
The frequency response of the A-weighting curve is shown above, where it can be seen that sounds entering our ears are de-emphasised below 500Hz and are most perceptible between 0.5-6kHz. Notice that the curve is unspecified above 20kHz, as this exceeds the human hearing range.
ASN FilterScript
ASN’s FilterScript symbolic math scripting language offers designers the ability to take an analog filter transfer function and transform it to its digital equivalent with just a few lines of code.
The analog transfer functions of the A and C-weighting curves are given below:
\(H_A(s) \approx \displaystyle{7.39705×10^9 \cdot s^4 \over (s + 129.4)^2\quad(s + 676.7)\quad (s + 4636)\quad (s + 76655)^2}\)
\(H_C(s) \approx \displaystyle{5.91797×10^9 \cdot s^2\over(s + 129.4)^2\quad (s + 76655)^2}\)
These analog transfer functions may be transformed into their digital equivalents via the bilinear() function. However, notice that \(H_A(s) \) requires a significant amount of algebracic manipulation in order to extract the denominator cofficients in powers of \(s\).
Convolution
A simple trick to perform polynomial multiplication is to use linear convolution, which is the same algebraic operation as multiplying two polynomials together. This may be easily performed via Filterscript’s conv() function, as follows:
y=conv(a,b);
As a simple example, the multiplication of \((s^2+2s+10)\) with \((s+5)\), would be defined as the following three lines of FilterScript code:
a={1,2,10};
b={1,5};
y=conv(a,b);
which yields, 1 7 20 50 or \((s^3+7s^2+20s+50)\)
For the A-weighting curve Laplace transfer function, the complete FilterScript code is given below:
ClearH1; // clear primary filter from cascade
Main() // main loop
a={1, 129.4};
b={1, 676.7};
c={1, 4636};
d={1, 76655};
aa=conv(a,a); // polynomial multiplication
dd=conv(d,d);
aab=conv(aa,b);
aabc=conv(aab,c);
Na=conv(aabc,dd);
Nb = {0 ,0 , 1 ,0 ,0 , 0, 0}; // define numerator coefficients
G = 7.397e+09; // define gain
Ha = analogtf(Nb, Na, G, "symbolic");
Hd = bilinear(Ha,0, "symbolic");
Num = getnum(Hd);
Den = getden(Hd);
Gain = getgain(Hd)/computegain(Hd,1e3); // set gain to 0dB@1kHz
Frequency response of analog vs digital A-weighting filter for \(f_s=48kHz\). As seen, the digital equivalent magnitude response matches the ideal analog magnitude response very closely until \(6kHz\).
The ITU-R 486–4 weighting curve
Another weighting curve of interest is the ITU-R 486–4 weighting curve, developed by the BBC. Unlike the A-weighting filter, the ITU-R 468–4 curve describes subjective loudness for broadband stimuli. The main disadvantage of the A-weighting curve is that it underestimates the loudness judgement of real-world stimuli particularly in the frequency band from about 1–9 kHz.
Due to the precise definition of the 486–4 weighting curve, there is no analog transfer function available. Instead the standard provides a table of amplitudes and frequencies – see here. This specification may be directly entered into Filterscript’s firarb() function for designing a suitable FIR filter, as shown below:
Frequency response of an ITU-R 468-4 FIR filter designed with Filterscript’s firarb() function for \(f_s=48kHz\)
As seen, FilterScript provides the designer with a very powerful symbolic scripting language for designing weighting curve filters. The following discussion now focuses on deployment of the A-weighting filter to an Arm based processor via the tool’s automatic code generator. The concepts and steps demonstrated below are equally valid for FIR filters.
Automatic code generation to Arm processor cores via CMSIS-DSP
The ASN Filter Designer’s automatic code generation engine facilitates the export of a designed filter to Cortex-M Arm based processors via the CMSIS-DSP software framework. The tool’s built-in analytics and help functions assist the designer in successfully configuring the design for deployment.
Before generating the code, the H2 filter (i.e. the filter designed in FilterScript) needs to be firstly re-optimised (transformed) to an H1 filter (main filter) structure for deployment. The options menu can be found under the P-Z tab in the main UI.
All floating point IIR filters designs must be based on Single Precision arithmetic and either a Direct Form I or Direct Form II Transposed filter structure. The Direct Form II Transposed structure is advocated for floating point implementation by virtue of its higher numerically accuracy.
Quantisation and filter structure settings can be found under the Q tab (as shown on the left). Setting Arithmetic to Single Precision and Structure to Direct Form II Transposed and clicking on the Apply button configures the IIR considered herein for the CMSIS-DSP software framework.
Select the Arm CMSIS-DSP framework from the selection box in the filter summary window:
The automatically generated C code based on the CMSIS-DSP framework for direct implementation on an Arm based Cortex-M processor is shown below:
As seen, the ASN Filter Designer’s automatic code generator generates all initialisation code, scaling and data structures needed to implement the A-weighting filter IIR filter via Arm’s CMSIS-DSP library.
https://www.advsolned.com/wp-content/uploads/2019/10/aweightingcurve.png420560ASN consultancy teamhttps://www.advsolned.com/wp-content/uploads/2018/02/ASN_logo.jpgASN consultancy team2019-10-03 21:22:482023-05-01 09:24:52A-weighting equalisation: Designing and deploying to Arm Cortex-M devices